Register 5 With The Bit Pattern Ff example essay topic
8 F 16 -- -1000 11112, Hence, the most significant bit of the hexadecimal notation 8 F is 1. ii. 6 A 16 -- -0110 11002, Hence, the most significant bit of the hexadecimal notation 8 F is 0. c. As mentioned above, a hexadecimal digit could be represented by four binary bits, the following bit patterns thus can be expressed as: i. 1010 1101 00112 -- - A D 316; ii. 0111 1001 11002 -- - 7 9 C 16. d. According to ASCII Character Codes Table (Eustace K. et al pp 9), the digits 3 and 1 are coded 33 H and 31 H respectively.
We can convert the decimal number 31 into binary representation by dividing it by 2, and keeping the remainder then: !! Quotient Remainder!! 31/2 15 1 Most Significant Bit 15/2 7 1 7/2 3 1 3/2 1 1 1/2 0 1 Least Significant Bit Then the binary digits will be represented from the LSB to MSB, i.e. 11111.2. a. We can still convert the decimal integers to their binary representations by the method above: i.!!
Quotient Remainder!! Quotient Remainder!! Under the two!'s complement system, the negative integer value is represented using the complement of positive value plus one. Thus, we convert 19 D into binary representation first: !!
Quotient Remainder!! 19/2 9 1 Most Significant Bit 9/2 4 1 4/2 2 0 2/2 1 0 1/2 0 1 Least Significant Bit So the 6-bit binary representation of 19 D is 0100112. Then, -1910 = Complement of 1910 + 1 = (010011) + 1 = 101100 +1 = 1011012. ii. In two!'s complement notation, nonnegative integers are rendered as ordinary binary numbers. Thus, we can still convert 2510 to its two!'s complement representations by dividing it by 2, and keeping the remainders: !! Quotient Remainder!!
The real numbers, represented in binary, can be converted to decimal by using the following table: Place Values Binary System = Decimal Calculation = Decimal Value!! 22 21 20.2-1 2-2 2-3! 0+2+0+0.5+0+0.125 = 2.625 ii 1 0 1.0 1 0 = 4+0+1+0+0.25+0 = 5.25d. The radix point divides the fractional part of a real number from the whole part. We will use different ways to convert the two parts to binary representation. At the whole part, we still divide the number by 2, and keep the remainders.
However, at the fractional part, we multiple the number by 2, and keep the integers, and the binary digit will be represented from the MSB to LSB: i. 3.75 = 3 + 0.75.!! Quotient Remainder!! 3/2 1 1 MSB 1/2 0 1 LSB The whole part of 3.7510 is represented in binary as 112.!! Integer Fraction!! 0.75 2 1 0.5 MSB 0.5 2 1 0 LSB The fractional part of 3.7510 is represented in binary as 0.112.
Therefore, the real number 3.7510 is converted to 11.112 (112 + 0.112). ii. 5.875 = 5 + 0.875.!! Quotient Remainder!! 5/2 2 1 MSB 2/2 1 0 1/2 0 1 LSB The whole part of 5.87510 is represented in binary as 1012.!! Thereby, the real number 5.87510 is converted to 101.1112 (1012 + 0.1112). e.
In two!'s complement notation, the leftmost bit represents the sign. So the least value of a 12-bit two!'s complement notation will be represented as 1000000000002 and the most value will be represented as 1111111111112. Register -- - A quite small number internal storage locations used for storing the instructions or data that are needed immediately or frequently, generally a register only hold a single instruction or data item. ii. Cache memory -- - An area of high-speed memory that holds portions of data also held within another storage device, it is often used to enhance the average speed of read and write operations to or from its associated storage device.. Primary storage -- - High-speed storage located inside a computer system.
It is accessed directly by the central processing unit, used to hold currently active programs and data immediately needed by those programs. iv. Secondary storage -- - A set of nonvolatile storage devices with large capacities. b. i. Clock rate -- - The rate at which clock ticks are generated by a clock, states in hertz. ii. Cycle time -- - The inverse of clock rate, and it refers to the time required to fetch and execute the simplest instruction, with respect to a CPU (central processing unit).. MIPS -- - A measure for program speed, it refers to millions of instructions in each second. iv. M FLOPS -- - Million of floating point operations per second, it is a measure of processor or computer system speed in terms of the number of floating point computation operations executed per second. c.!!
Brookshear's Machine Language!! Translation i. 25 FF: LOAD the register 5 with the bit pattern FF. ii. 3 A 12: STORE the bit pattern found in register A in the memory cell whose address is 12.4034: MOVE the bit pattern found in register 3 to register 4. iv 7789: OR the bit patterns in register 8 and 9 and place the result in register 7. d. i. Adress Contents Machine language (2 bytes at a time) & Translation 08 2 A 09 3 D 0 A 14 0 B FF 0 C F 0... 80 11 1109: LOAD contents of cell 09 into register 1.81 09 82 12 120 A: LOAD contents of cell 0 A into register 2.83 0 A 84 23 230 A: LOAD the register 3 with the bit pattern 0 A. 85 0 A 86 54 5413: ADD R 1 and R 3 as binary values, place result into register 4.87 13 88 A 4 A 403: ROTATE the contents of R 4 3 bits to the right in a circular fashion.
89 03 8 A 85 8524: AND R 2 and R 4 as binary values, place result into register 5.8 B 24 8 C 34 340 B: STORE contents of register 4 into cell 0 B. 8 D 0 B 8 E 35 350 C: STORE contents of register 5 into cell 0 C. 8 F 0 C 90 C 0 C 000: HALT. 91 00 92.93. ii. According to the table above, it the content of Cell OC stop at 0000000 when the machine halts execution. iv. Program counter (Instruction Pointer) will record the address that the next instruction locates when an instruction is done.
Say the program counter is incremented by the control unit after last fetch cycle. And the content of the program counter is 9316.4. a. i. 1100 1010 ii. 1001 1100 AND 0101 0011 OR 0011 1010 0100 0010 1011 1110 . 1001 1010 iv.
1001 0110 XOR 0101 1100 NOT 1100 0110 0110 1001 b. i. Hexadecimal Place Values Binary System = Decimal Calculation = Decimal Value!! Notation 27 26 25 24 23 22 21 20! X B 128+32+16+8+4 = 188 Y 664+32+4+1 = 101 ii. We need to determine the original bit patterns of the negative value under the two!'s complement. Here BC 16 is a negative value because the MSB of its bit patterns is 1.
According to the transformation formula: Complement of positive value + 1 = negative representation We can conclude that: Original bit pattern = Complement of the difference negative presentation and 1, i.e. Original bit pattern of BC 16 = (10111100 "C 00000001) = (10111011) = 01000100 So the decimal value of BC 16 = - (64 + 4) = -68. Nonnegative integers are rendered as ordinary binary numbers in two!'s complement notation, so the decimal value of 6516 is still equal to 101. c. A CISC CPU refers to the complex instruction set computing processor. The early CPU designers developed it some years ago. The CISC CPU consists of a perfect set of instructions, and is of strong function. Moreover, its structure is quite complicated, controlling by a set of hardware circuitry.
The RISC CPU refers to the reduced instruction set computing processor. It appeared in the late 1980's, invented by the Intel Company. It only consists of a set of simple instructions. Compared with the two kinds of CPUs, it!'s not difficult to find that the CISC is much stronger in the effectiveness of processor operation. The CISC is speeder than RISC, and it also occupy little space to record. But the CISC!'s circuitry is much more complex than the RISC.
Certainly it will be more expensive in price because of its high cost. The Intel Company developed the series of Pentium. All of the series of Pentium belong to CISC CPUs, so does the Pentium c'o. d. A word is a unit of data that contains a fixed number or bytes or bits, and it is always defined as the amount of data that a CPU processes at one time.
(Burd. pp 134). Say that a word is processed by a single instruction. Thus the word size refers to the width of the word. It is a basic component when a CPU is designed.
The word size is usually in line with the width of the system bus. So it!'s easy to find that if the length of a word is wider than others, the CPU!'s speed will be faster too. However, as we know, not all kinds of data are very large, sometimes we just use the CPU to execute a single instruction, and then just a quite small number of bits get through the system bus. Therefore, if the word size is too long, that must make a large loss on both of the resources and space of the computer. e. Both data bus and address bus are the subsets of the system bus. Just like the name itself, the data bus moves data among system components.
Usually the number of bus lines is equal to, or a multiple of the CPU word size. The data got through the address bus is the bit pattern of a memory address. Nowadays, the address buses typically have 32 bus lines. The address bus is only used for bus transfers in which main memory is the destination. 5. a. i. 512!' A 50!' A 1024!' A 8 = 29!' A 50!' A 210!' A 23 = 200 MB. ii. Assume the disk drive will access the data located in each first track of each side at first and the head stay at the first platter side initially.
Before disk drive begins to access the data, it must find the first sector to make the data accessing process sequentially. Because we doesn! t know where the sector locate on the track, we just work out an average time first: 60! ^A 8000! ^A 2 = 0.00375's. The disk drive will seek the read / write head for 1024!' A 8 times.
With the 8 head will go forward at the same time, the stepper motor will only work 1024 times. We need to determine the number of points in the matrix map: 1200!' A 800!' A 24 = 23,040,000 bits. By dividing it by 8, we will get the number of byte-size memory cells in matrix: 2,304,000! ^A 8 = 2,880,000 bytes = 2.88 MB. c. A cache is a storage area (usually RAM) used to improve system performance. The performance improvement of a cache mainly depends on the fast access speed of the RAM that is used to implement the cache.
Meanwhile, the improvements also require a sufficiently large cache and smart application of it. When we read data from a storage device using a cache, we should consider whether the requested data is already waiting in the cache. When the read accesses first are routed to the cache, the requested data will be accessed directly from the cache. The computer performance is significantly improved because that it is much faster to access to a cache than access to the storage device. If the requested data is not in the cache, the CPU must be read from the storage devices. Cache also can cause a significant performance improvement when writing data to a storage device.
It is proved when a write access is confirmed before anther can begin. For example, if we backup some data on hard disk the CPU store the data in the cache first and then transfer the data to the magnetic disk.